平台keil V5.31ADC引脚PC0和PC2触发引脚PE7触发定时器TMR0_1配置#define ADC_UNIT (CM_ADC1) #define ADC_PERIPH_CLK (FCG3_PERIPH_ADC1) /* Selects ADC channels that needed. */ #define ADC_SEQA_CH (ADC_CH10) #define ADC_SEQA_CH_PORT (GPIO_PORT_C) #define ADC_SEQA_CH_PIN (GPIO_PIN_00) #define ADC_SEQB_CH (ADC_CH12) #define ADC_SEQB_CH_PORT (GPIO_PORT_C) #define ADC_SEQB_CH_PIN (GPIO_PIN_02) /* Hard trigger */ #define ADC_SEQA_HARDTRIG (ADC_HARDTRIG_ADTRG_PIN) #define ADC_SEQA_TRIG_PORT (GPIO_PORT_E) #define ADC_SEQA_TRIG_PIN (GPIO_PIN_07) #define ADC_SEQA_TRIG_PIN_FUNC (GPIO_FUNC_1) #define ADC_SEQB_HARDTRIG (ADC_HARDTRIG_EVT0) #define ADC_SEQB_AOS_TRIG_SEL (AOS_ADC1_0) #define ADC_SEQB_TRIG_EVT (EVT_SRC_TMR0_1_CMP_B) /* Timer0 for sequence B */ #define TMR0_UNIT (CM_TMR0_1) #define TMR0_CH (TMR0_CH_B) #define TMR0_PERIPH_CLK (FCG2_PERIPH_TMR0_1) #define TMR0_CLK_DIV (TMR0_CLK_DIV256) /* Period 1 Second, TMR0_CMP_VAL Timer0 clock / div - 1 */ #define TMR0_CMP_VAL (CLK_GetBusClockFreq(CLK_BUS_PCLK1) / (1UL (TMR0_CLK_DIV TMR0_BCONR_CKDIVA_POS)) - 1UL) #define TMR0_PERIPH_ENABLE() FCG_Fcg2PeriphClockCmd(TMR0_PERIPH_CLK, ENABLE) /* Interrupt */ #define ADC_SEQA_INT_PRIO (DDL_IRQ_PRIO_04) #define ADC_SEQA_INT_SRC (INT_SRC_ADC1_EOCA) #define ADC_SEQA_INT_IRQn (INT116_IRQn) #define ADC_SEQB_INT_PRIO (DDL_IRQ_PRIO_03) #define ADC_SEQB_INT_SRC (INT_SRC_ADC1_EOCB) #define ADC_SEQB_INT_IRQn (INT117_IRQn)主函数int32_t main(void) { /* MCU Peripheral registers write unprotected. */ LL_PERIPH_WE(LL_PERIPH_GPIO | LL_PERIPH_FCG | LL_PERIPH_PWC_CLK_RMU); /* System clock config */ SystemClockConfig(); /* Initializes UART for debug printing. Baudrate is 115200. */ DDL_PrintfInit(BSP_PRINTF_DEVICE, BSP_PRINTF_BAUDRATE, BSP_PRINTF_Preinit); /* Configures ADC. */ AdcConfig(); /* MCU Peripheral registers write protected. */ LL_PERIPH_WP(LL_PERIPH_GPIO | LL_PERIPH_FCG | LL_PERIPH_PWC_CLK_RMU); /* Start the peripheral which is used to trigger ADC. */ AdcHardTriggerStart(); /***************** Configuration end, application start **************/ for (;;) { /* See ADC1_SeqA_IrqCallback(), ADC1_SeqB_IrqCallback() */ } }clockstatic void SystemClockConfig(void) { stc_clock_xtal_init_t stcXtalInit; /* XTAL config */ GPIO_AnalogCmd(BSP_XTAL_PORT, BSP_XTAL_PIN, ENABLE); (void)CLK_XtalStructInit(stcXtalInit); /* Config XTAL and Enable XTAL */ stcXtalInit.u8State CLK_XTAL_ON; stcXtalInit.u8Mode CLK_XTAL_MD_OSC; stcXtalInit.u8Drv CLK_XTAL_DRV_ULOW; stcXtalInit.u8StableTime CLK_XTAL_STB_2MS; (void)CLK_XtalInit(stcXtalInit); CLK_SetSysClockSrc(CLK_SYSCLK_SRC_XTAL); }static void AdcConfig(void) { AdcInitConfig(); AdcHardTriggerConfig(); AdcIrqConfig(); } static void AdcInitConfig(void) { stc_adc_init_t stcAdcInit; /* 1. Enable ADC peripheral clock. */ FCG_Fcg3PeriphClockCmd(ADC_PERIPH_CLK, ENABLE); /* 2. Modify the default value depends on the application. */ (void)ADC_StructInit(stcAdcInit); stcAdcInit.u16ScanMode ADC_MD_SEQA_SEQB_SINGLESHOT; /* 3. Initializes ADC. */ (void)ADC_Init(ADC_UNIT, stcAdcInit); /* 4. ADC channel configuration. */ /* 4.1 Set the ADC pin to analog input mode. */ AdcSetPinAnalogMode(); /* 4.2 Enable ADC channels. */ ADC_ChCmd(ADC_UNIT, ADC_SEQ_A, ADC_SEQA_CH, ENABLE); ADC_ChCmd(ADC_UNIT, ADC_SEQ_B, ADC_SEQB_CH, ENABLE); } static void AdcSetPinAnalogMode(void) { stc_gpio_init_t stcGpioInit; (void)GPIO_StructInit(stcGpioInit); stcGpioInit.u16PinAttr PIN_ATTR_ANALOG; (void)GPIO_Init(ADC_SEQA_CH_PORT, ADC_SEQA_CH_PIN, stcGpioInit); (void)GPIO_Init(ADC_SEQB_CH_PORT, ADC_SEQB_CH_PIN, stcGpioInit); } static void AdcHardTriggerConfig(void) { stc_tmr0_init_t stcTmr0Init; /************** Hard trigger of sequence A ****************/ GPIO_SetFunc(ADC_SEQA_TRIG_PORT, ADC_SEQA_TRIG_PIN, ADC_SEQA_TRIG_PIN_FUNC); ADC_TriggerConfig(ADC_UNIT, ADC_SEQ_A, ADC_SEQA_HARDTRIG); ADC_TriggerCmd(ADC_UNIT, ADC_SEQ_A, ENABLE); /************** Hard trigger of sequence B ****************/ /* Initials TIMER0. */ (void)TMR0_StructInit(stcTmr0Init); stcTmr0Init.u32ClockDiv TMR0_CLK_DIV; stcTmr0Init.u16CompareValue (uint16_t)TMR0_CMP_VAL; TMR0_PERIPH_ENABLE(); (void)TMR0_Init(TMR0_UNIT, TMR0_CH, stcTmr0Init); /* Specifies the event defined by ADC_SEQB_TRIG_EVT as the hard trigger of sequence B. */ FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE); ADC_TriggerConfig(ADC_UNIT, ADC_SEQ_B, ADC_SEQB_HARDTRIG); AOS_SetTriggerEventSrc(ADC_SEQB_AOS_TRIG_SEL, ADC_SEQB_TRIG_EVT); ADC_TriggerCmd(ADC_UNIT, ADC_SEQ_B, ENABLE); } static void AdcHardTriggerStart(void) { /************** Hard trigger of sequence A ****************/ /* Not needed here. */ /************** Hard trigger of sequence B ****************/ TMR0_Start(TMR0_UNIT, TMR0_CH); } static void AdcIrqConfig(void) { stc_irq_signin_config_t stcIrq; stcIrq.enIntSrc ADC_SEQA_INT_SRC; stcIrq.enIRQn ADC_SEQA_INT_IRQn; stcIrq.pfnCallback ADC1_SeqA_IrqCallback; (void)INTC_IrqSignIn(stcIrq); NVIC_ClearPendingIRQ(stcIrq.enIRQn); NVIC_SetPriority(stcIrq.enIRQn, ADC_SEQA_INT_PRIO); NVIC_EnableIRQ(stcIrq.enIRQn); stcIrq.enIntSrc ADC_SEQB_INT_SRC; stcIrq.enIRQn ADC_SEQB_INT_IRQn; stcIrq.pfnCallback ADC1_SeqB_IrqCallback; (void)INTC_IrqSignIn(stcIrq); NVIC_ClearPendingIRQ(stcIrq.enIRQn); NVIC_SetPriority(stcIrq.enIRQn, ADC_SEQB_INT_PRIO); NVIC_EnableIRQ(stcIrq.enIRQn); ADC_IntCmd(ADC_UNIT, ADC_INT_EOCA | ADC_INT_EOCB, ENABLE); } static void ADC1_SeqA_IrqCallback(void) { uint16_t u16AdcVal; u16AdcVal ADC_GetValue(ADC_UNIT, ADC_SEQA_CH); ADC_ClearStatus(ADC_UNIT, ADC_FLAG_EOCA); DDL_Printf(ADC sequence A was triggered by ADTRG pin.\r\n); DDL_Printf(ADC value of sequence A channel: %u\r\n, u16AdcVal); } static void ADC1_SeqB_IrqCallback(void) { uint16_t u16AdcVal; u16AdcVal ADC_GetValue(ADC_UNIT, ADC_SEQB_CH); ADC_ClearStatus(ADC_UNIT, ADC_FLAG_EOCB); DDL_Printf(ADC sequence B was triggered by TMR0 event.\r\n); DDL_Printf(ADC value of sequence B channel: %u\r\n, u16AdcVal); }实验结果定时器TMR0_1中断触发ADC采样1秒一次PE7下降沿触发ADC采样。1、PB和PE的功能一样修改成PB7/* Hard trigger */ #define ADC_SEQA_HARDTRIG (ADC_HARDTRIG_ADTRG_PIN) #define ADC_SEQA_TRIG_PORT (GPIO_PORT_B) #define ADC_SEQA_TRIG_PIN (GPIO_PIN_07) #define ADC_SEQA_TRIG_PIN_FUNC (GPIO_FUNC_1)2、中断号随便改比如改成016也可以/* Interrupt */ #define ADC_SEQA_INT_PRIO (DDL_IRQ_PRIO_04) #define ADC_SEQA_INT_SRC (INT_SRC_ADC1_EOCA) #define ADC_SEQA_INT_IRQn (INT016_IRQn) #define ADC_SEQB_INT_PRIO (DDL_IRQ_PRIO_03) #define ADC_SEQB_INT_SRC (INT_SRC_ADC1_EOCB) #define ADC_SEQB_INT_IRQn (INT017_IRQn)3、修改定时器为TMR0_2:配置#define ADC_SEQB_HARDTRIG (ADC_HARDTRIG_EVT0) #define ADC_SEQB_AOS_TRIG_SEL (AOS_ADC1_0) #define ADC_SEQB_TRIG_EVT (EVT_SRC_TMR0_2_CMP_B) /* Timer0 for sequence B */ #define TMR0_UNIT (CM_TMR0_2) #define TMR0_CH (TMR0_CH_B) #define TMR0_PERIPH_CLK (FCG2_PERIPH_TMR0_2) #define TMR0_CLK_DIV (TMR0_CLK_DIV256) /* Period 1 Second, TMR0_CMP_VAL Timer0 clock / div - 1 */ #define TMR0_CMP_VAL (CLK_GetBusClockFreq(CLK_BUS_PCLK1) / (1UL (TMR0_CLK_DIV TMR0_BCONR_CKDIVA_POS)) - 1UL) #define TMR0_PERIPH_ENABLE() FCG_Fcg2PeriphClockCmd(TMR0_PERIPH_CLK, ENABLE)4、修改定时器为TMRA_1/******************************************************************************* * Include files ******************************************************************************/ #include main.h /* ADC unit instance for this example. */ #define ADC_UNIT (CM_ADC1) #define ADC_PERIPH_CLK (FCG3_PERIPH_ADC1) /* Selects ADC channels that needed. */ #define ADC_SEQA_CH (ADC_CH10) #define ADC_SEQA_CH_PORT (GPIO_PORT_C) #define ADC_SEQA_CH_PIN (GPIO_PIN_00) #define ADC_SEQB_CH (ADC_CH12) #define ADC_SEQB_CH_PORT (GPIO_PORT_C) #define ADC_SEQB_CH_PIN (GPIO_PIN_02) ///* Hard trigger */ //#define ADC_SEQA_HARDTRIG (ADC_HARDTRIG_ADTRG_PIN) //#define ADC_SEQA_TRIG_PORT (GPIO_PORT_E) //#define ADC_SEQA_TRIG_PIN (GPIO_PIN_07) //#define ADC_SEQA_TRIG_PIN_FUNC (GPIO_FUNC_1) /* Hard trigger */ #define ADC_SEQA_HARDTRIG (ADC_HARDTRIG_ADTRG_PIN) #define ADC_SEQA_TRIG_PORT (GPIO_PORT_B) #define ADC_SEQA_TRIG_PIN (GPIO_PIN_07) #define ADC_SEQA_TRIG_PIN_FUNC (GPIO_FUNC_1) #define ADC_SEQB_HARDTRIG (ADC_HARDTRIG_EVT0) #define ADC_SEQB_AOS_TRIG_SEL (AOS_ADC1_0) //#define ADC_SEQB_TRIG_EVT (EVT_SRC_TMR0_1_CMP_B) //#define ADC_SEQB_TRIG_EVT (EVT_SRC_TMR0_2_CMP_B) #define ADC_SEQB_TRIG_EVT (EVT_SRC_TMRA_1_OVF) ///* Timer0 for sequence B */ //#define TMR0_UNIT (CM_TMR0_1) //#define TMR0_CH (TMR0_CH_B) //#define TMR0_PERIPH_CLK (FCG2_PERIPH_TMR0_1) //#define TMR0_CLK_DIV (TMR0_CLK_DIV256) ///* Period 1 Second, TMR0_CMP_VAL Timer0 clock / div - 1 */ //#define TMR0_CMP_VAL (CLK_GetBusClockFreq(CLK_BUS_PCLK1) / (1UL (TMR0_CLK_DIV TMR0_BCONR_CKDIVA_POS)) - 1UL) //#define TMR0_PERIPH_ENABLE() FCG_Fcg2PeriphClockCmd(TMR0_PERIPH_CLK, ENABLE) ///* Timer0 for sequence B */ //#define TMR0_UNIT (CM_TMR0_2) //#define TMR0_CH (TMR0_CH_B) //#define TMR0_PERIPH_CLK (FCG2_PERIPH_TMR0_2) //#define TMR0_CLK_DIV (TMR0_CLK_DIV256) ///* Period 1 Second, TMR0_CMP_VAL Timer0 clock / div - 1 */ //#define TMR0_CMP_VAL (CLK_GetBusClockFreq(CLK_BUS_PCLK1) / (1UL (TMR0_CLK_DIV TMR0_BCONR_CKDIVA_POS)) - 1UL) //#define TMR0_PERIPH_ENABLE() FCG_Fcg2PeriphClockCmd(TMR0_PERIPH_CLK, ENABLE) /* TimerA for sequence B */ #define TMRA_UNIT (CM_TMRA_1) #define TMRA_CH (TMRA_CH_B) #define TMRA_PERIPH_CLK (FCG2_PERIPH_TMRA_1) #define TMRA_CLK_DIV (TMRA_CLK_DIV256) /* Period 1 Second, TMR0_CMP_VAL Timer0 clock / div - 1 */ #define TMRA_PERIOD_VAL ( (CLK_GetBusClockFreq(CLK_BUS_PCLK1) / 256UL) - 1UL ) #define TMRA_PERIPH_ENABLE() FCG_Fcg2PeriphClockCmd(TMRA_PERIPH_CLK, ENABLE) /* Interrupt */ #define ADC_SEQA_INT_PRIO (DDL_IRQ_PRIO_04) #define ADC_SEQA_INT_SRC (INT_SRC_ADC1_EOCA) //#define ADC_SEQA_INT_IRQn (INT116_IRQn) #define ADC_SEQA_INT_IRQn (INT016_IRQn) //any #define ADC_SEQB_INT_PRIO (DDL_IRQ_PRIO_03) #define ADC_SEQB_INT_SRC (INT_SRC_ADC1_EOCB) //#define ADC_SEQB_INT_IRQn (INT117_IRQn) #define ADC_SEQB_INT_IRQn (INT017_IRQn) static void SystemClockConfig(void); static void AdcConfig(void); static void AdcInitConfig(void); static void AdcSetPinAnalogMode(void); static void AdcHardTriggerConfig(void); static void AdcIrqConfig(void); static void AdcHardTriggerStart(void); static void ADC1_SeqA_IrqCallback(void); static void ADC1_SeqB_IrqCallback(void); int32_t main(void) { /* MCU Peripheral registers write unprotected. */ LL_PERIPH_WE(LL_PERIPH_GPIO | LL_PERIPH_FCG | LL_PERIPH_PWC_CLK_RMU); /* System clock config */ SystemClockConfig(); /* Initializes UART for debug printing. Baudrate is 115200. */ DDL_PrintfInit(BSP_PRINTF_DEVICE, BSP_PRINTF_BAUDRATE, BSP_PRINTF_Preinit); /* Configures ADC. */ AdcConfig(); /* MCU Peripheral registers write protected. */ LL_PERIPH_WP(LL_PERIPH_GPIO | LL_PERIPH_FCG | LL_PERIPH_PWC_CLK_RMU); /* Start the peripheral which is used to trigger ADC. */ AdcHardTriggerStart(); /***************** Configuration end, application start **************/ for (;;) { /* See ADC1_SeqA_IrqCallback(), ADC1_SeqB_IrqCallback() */ } } static void SystemClockConfig(void) { stc_clock_xtal_init_t stcXtalInit; /* XTAL config */ GPIO_AnalogCmd(BSP_XTAL_PORT, BSP_XTAL_PIN, ENABLE); (void)CLK_XtalStructInit(stcXtalInit); /* Config XTAL and Enable XTAL */ stcXtalInit.u8State CLK_XTAL_ON; stcXtalInit.u8Mode CLK_XTAL_MD_OSC; stcXtalInit.u8Drv CLK_XTAL_DRV_ULOW; stcXtalInit.u8StableTime CLK_XTAL_STB_2MS; (void)CLK_XtalInit(stcXtalInit); CLK_SetSysClockSrc(CLK_SYSCLK_SRC_XTAL); } static void AdcConfig(void) { AdcInitConfig(); AdcHardTriggerConfig(); AdcIrqConfig(); } static void AdcInitConfig(void) { stc_adc_init_t stcAdcInit; /* 1. Enable ADC peripheral clock. */ FCG_Fcg3PeriphClockCmd(ADC_PERIPH_CLK, ENABLE); /* 2. Modify the default value depends on the application. */ (void)ADC_StructInit(stcAdcInit); stcAdcInit.u16ScanMode ADC_MD_SEQA_SEQB_SINGLESHOT; /* 3. Initializes ADC. */ (void)ADC_Init(ADC_UNIT, stcAdcInit); /* 4. ADC channel configuration. */ /* 4.1 Set the ADC pin to analog input mode. */ AdcSetPinAnalogMode(); /* 4.2 Enable ADC channels. */ ADC_ChCmd(ADC_UNIT, ADC_SEQ_A, ADC_SEQA_CH, ENABLE); ADC_ChCmd(ADC_UNIT, ADC_SEQ_B, ADC_SEQB_CH, ENABLE); } static void AdcSetPinAnalogMode(void) { stc_gpio_init_t stcGpioInit; (void)GPIO_StructInit(stcGpioInit); stcGpioInit.u16PinAttr PIN_ATTR_ANALOG; (void)GPIO_Init(ADC_SEQA_CH_PORT, ADC_SEQA_CH_PIN, stcGpioInit); (void)GPIO_Init(ADC_SEQB_CH_PORT, ADC_SEQB_CH_PIN, stcGpioInit); } static void AdcHardTriggerConfig(void) { stc_tmra_init_t stcTmraInit; /************** Hard trigger of sequence A ****************/ GPIO_SetFunc(ADC_SEQA_TRIG_PORT, ADC_SEQA_TRIG_PIN, ADC_SEQA_TRIG_PIN_FUNC); ADC_TriggerConfig(ADC_UNIT, ADC_SEQ_A, ADC_SEQA_HARDTRIG); ADC_TriggerCmd(ADC_UNIT, ADC_SEQ_A, ENABLE); /************** Hard trigger of sequence B ****************/ /* Initials TIMER0. */ (void)TMRA_StructInit(stcTmraInit); stcTmraInit.sw_count.u8ClockDiv TMRA_CLK_DIV; stcTmraInit.u32PeriodValue (uint16_t)TMRA_PERIOD_VAL; TMRA_PERIPH_ENABLE(); (void)TMRA_Init(TMRA_UNIT, stcTmraInit); /* Specifies the event defined by ADC_SEQB_TRIG_EVT as the hard trigger of sequence B. */ FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE); ADC_TriggerConfig(ADC_UNIT, ADC_SEQ_B, ADC_SEQB_HARDTRIG); AOS_SetTriggerEventSrc(ADC_SEQB_AOS_TRIG_SEL, ADC_SEQB_TRIG_EVT); ADC_TriggerCmd(ADC_UNIT, ADC_SEQ_B, ENABLE); } static void AdcHardTriggerStart(void) { /************** Hard trigger of sequence A ****************/ /* Not needed here. */ /************** Hard trigger of sequence B ****************/ TMRA_Start(TMRA_UNIT); } static void AdcIrqConfig(void) { stc_irq_signin_config_t stcIrq; stcIrq.enIntSrc ADC_SEQA_INT_SRC; stcIrq.enIRQn ADC_SEQA_INT_IRQn; stcIrq.pfnCallback ADC1_SeqA_IrqCallback; (void)INTC_IrqSignIn(stcIrq); NVIC_ClearPendingIRQ(stcIrq.enIRQn); NVIC_SetPriority(stcIrq.enIRQn, ADC_SEQA_INT_PRIO); NVIC_EnableIRQ(stcIrq.enIRQn); stcIrq.enIntSrc ADC_SEQB_INT_SRC; stcIrq.enIRQn ADC_SEQB_INT_IRQn; stcIrq.pfnCallback ADC1_SeqB_IrqCallback; (void)INTC_IrqSignIn(stcIrq); NVIC_ClearPendingIRQ(stcIrq.enIRQn); NVIC_SetPriority(stcIrq.enIRQn, ADC_SEQB_INT_PRIO); NVIC_EnableIRQ(stcIrq.enIRQn); ADC_IntCmd(ADC_UNIT, ADC_INT_EOCA | ADC_INT_EOCB, ENABLE); } static void ADC1_SeqA_IrqCallback(void) { uint16_t u16AdcVal; u16AdcVal ADC_GetValue(ADC_UNIT, ADC_SEQA_CH); ADC_ClearStatus(ADC_UNIT, ADC_FLAG_EOCA); DDL_Printf(ADC sequence A was triggered by ADTRG pin.\r\n); DDL_Printf(ADC value of sequence A channel: %u\r\n, u16AdcVal); } static void ADC1_SeqB_IrqCallback(void) { uint16_t u16AdcVal; u16AdcVal ADC_GetValue(ADC_UNIT, ADC_SEQB_CH); ADC_ClearStatus(ADC_UNIT, ADC_FLAG_EOCB); DDL_Printf(ADC sequence B was triggered by TMRA_1 event.\r\n); DDL_Printf(ADC value of sequence B channel: %u\r\n, u16AdcVal); }改成TMRA_2跟TMR0_1改TMR0_2类似。 小华芯片HC32F460之ADC_hard_trigger
平台keil V5.31ADC引脚PC0和PC2触发引脚PE7触发定时器TMR0_1配置#define ADC_UNIT (CM_ADC1) #define ADC_PERIPH_CLK (FCG3_PERIPH_ADC1) /* Selects ADC channels that needed. */ #define ADC_SEQA_CH (ADC_CH10) #define ADC_SEQA_CH_PORT (GPIO_PORT_C) #define ADC_SEQA_CH_PIN (GPIO_PIN_00) #define ADC_SEQB_CH (ADC_CH12) #define ADC_SEQB_CH_PORT (GPIO_PORT_C) #define ADC_SEQB_CH_PIN (GPIO_PIN_02) /* Hard trigger */ #define ADC_SEQA_HARDTRIG (ADC_HARDTRIG_ADTRG_PIN) #define ADC_SEQA_TRIG_PORT (GPIO_PORT_E) #define ADC_SEQA_TRIG_PIN (GPIO_PIN_07) #define ADC_SEQA_TRIG_PIN_FUNC (GPIO_FUNC_1) #define ADC_SEQB_HARDTRIG (ADC_HARDTRIG_EVT0) #define ADC_SEQB_AOS_TRIG_SEL (AOS_ADC1_0) #define ADC_SEQB_TRIG_EVT (EVT_SRC_TMR0_1_CMP_B) /* Timer0 for sequence B */ #define TMR0_UNIT (CM_TMR0_1) #define TMR0_CH (TMR0_CH_B) #define TMR0_PERIPH_CLK (FCG2_PERIPH_TMR0_1) #define TMR0_CLK_DIV (TMR0_CLK_DIV256) /* Period 1 Second, TMR0_CMP_VAL Timer0 clock / div - 1 */ #define TMR0_CMP_VAL (CLK_GetBusClockFreq(CLK_BUS_PCLK1) / (1UL (TMR0_CLK_DIV TMR0_BCONR_CKDIVA_POS)) - 1UL) #define TMR0_PERIPH_ENABLE() FCG_Fcg2PeriphClockCmd(TMR0_PERIPH_CLK, ENABLE) /* Interrupt */ #define ADC_SEQA_INT_PRIO (DDL_IRQ_PRIO_04) #define ADC_SEQA_INT_SRC (INT_SRC_ADC1_EOCA) #define ADC_SEQA_INT_IRQn (INT116_IRQn) #define ADC_SEQB_INT_PRIO (DDL_IRQ_PRIO_03) #define ADC_SEQB_INT_SRC (INT_SRC_ADC1_EOCB) #define ADC_SEQB_INT_IRQn (INT117_IRQn)主函数int32_t main(void) { /* MCU Peripheral registers write unprotected. */ LL_PERIPH_WE(LL_PERIPH_GPIO | LL_PERIPH_FCG | LL_PERIPH_PWC_CLK_RMU); /* System clock config */ SystemClockConfig(); /* Initializes UART for debug printing. Baudrate is 115200. */ DDL_PrintfInit(BSP_PRINTF_DEVICE, BSP_PRINTF_BAUDRATE, BSP_PRINTF_Preinit); /* Configures ADC. */ AdcConfig(); /* MCU Peripheral registers write protected. */ LL_PERIPH_WP(LL_PERIPH_GPIO | LL_PERIPH_FCG | LL_PERIPH_PWC_CLK_RMU); /* Start the peripheral which is used to trigger ADC. */ AdcHardTriggerStart(); /***************** Configuration end, application start **************/ for (;;) { /* See ADC1_SeqA_IrqCallback(), ADC1_SeqB_IrqCallback() */ } }clockstatic void SystemClockConfig(void) { stc_clock_xtal_init_t stcXtalInit; /* XTAL config */ GPIO_AnalogCmd(BSP_XTAL_PORT, BSP_XTAL_PIN, ENABLE); (void)CLK_XtalStructInit(stcXtalInit); /* Config XTAL and Enable XTAL */ stcXtalInit.u8State CLK_XTAL_ON; stcXtalInit.u8Mode CLK_XTAL_MD_OSC; stcXtalInit.u8Drv CLK_XTAL_DRV_ULOW; stcXtalInit.u8StableTime CLK_XTAL_STB_2MS; (void)CLK_XtalInit(stcXtalInit); CLK_SetSysClockSrc(CLK_SYSCLK_SRC_XTAL); }static void AdcConfig(void) { AdcInitConfig(); AdcHardTriggerConfig(); AdcIrqConfig(); } static void AdcInitConfig(void) { stc_adc_init_t stcAdcInit; /* 1. Enable ADC peripheral clock. */ FCG_Fcg3PeriphClockCmd(ADC_PERIPH_CLK, ENABLE); /* 2. Modify the default value depends on the application. */ (void)ADC_StructInit(stcAdcInit); stcAdcInit.u16ScanMode ADC_MD_SEQA_SEQB_SINGLESHOT; /* 3. Initializes ADC. */ (void)ADC_Init(ADC_UNIT, stcAdcInit); /* 4. ADC channel configuration. */ /* 4.1 Set the ADC pin to analog input mode. */ AdcSetPinAnalogMode(); /* 4.2 Enable ADC channels. */ ADC_ChCmd(ADC_UNIT, ADC_SEQ_A, ADC_SEQA_CH, ENABLE); ADC_ChCmd(ADC_UNIT, ADC_SEQ_B, ADC_SEQB_CH, ENABLE); } static void AdcSetPinAnalogMode(void) { stc_gpio_init_t stcGpioInit; (void)GPIO_StructInit(stcGpioInit); stcGpioInit.u16PinAttr PIN_ATTR_ANALOG; (void)GPIO_Init(ADC_SEQA_CH_PORT, ADC_SEQA_CH_PIN, stcGpioInit); (void)GPIO_Init(ADC_SEQB_CH_PORT, ADC_SEQB_CH_PIN, stcGpioInit); } static void AdcHardTriggerConfig(void) { stc_tmr0_init_t stcTmr0Init; /************** Hard trigger of sequence A ****************/ GPIO_SetFunc(ADC_SEQA_TRIG_PORT, ADC_SEQA_TRIG_PIN, ADC_SEQA_TRIG_PIN_FUNC); ADC_TriggerConfig(ADC_UNIT, ADC_SEQ_A, ADC_SEQA_HARDTRIG); ADC_TriggerCmd(ADC_UNIT, ADC_SEQ_A, ENABLE); /************** Hard trigger of sequence B ****************/ /* Initials TIMER0. */ (void)TMR0_StructInit(stcTmr0Init); stcTmr0Init.u32ClockDiv TMR0_CLK_DIV; stcTmr0Init.u16CompareValue (uint16_t)TMR0_CMP_VAL; TMR0_PERIPH_ENABLE(); (void)TMR0_Init(TMR0_UNIT, TMR0_CH, stcTmr0Init); /* Specifies the event defined by ADC_SEQB_TRIG_EVT as the hard trigger of sequence B. */ FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE); ADC_TriggerConfig(ADC_UNIT, ADC_SEQ_B, ADC_SEQB_HARDTRIG); AOS_SetTriggerEventSrc(ADC_SEQB_AOS_TRIG_SEL, ADC_SEQB_TRIG_EVT); ADC_TriggerCmd(ADC_UNIT, ADC_SEQ_B, ENABLE); } static void AdcHardTriggerStart(void) { /************** Hard trigger of sequence A ****************/ /* Not needed here. */ /************** Hard trigger of sequence B ****************/ TMR0_Start(TMR0_UNIT, TMR0_CH); } static void AdcIrqConfig(void) { stc_irq_signin_config_t stcIrq; stcIrq.enIntSrc ADC_SEQA_INT_SRC; stcIrq.enIRQn ADC_SEQA_INT_IRQn; stcIrq.pfnCallback ADC1_SeqA_IrqCallback; (void)INTC_IrqSignIn(stcIrq); NVIC_ClearPendingIRQ(stcIrq.enIRQn); NVIC_SetPriority(stcIrq.enIRQn, ADC_SEQA_INT_PRIO); NVIC_EnableIRQ(stcIrq.enIRQn); stcIrq.enIntSrc ADC_SEQB_INT_SRC; stcIrq.enIRQn ADC_SEQB_INT_IRQn; stcIrq.pfnCallback ADC1_SeqB_IrqCallback; (void)INTC_IrqSignIn(stcIrq); NVIC_ClearPendingIRQ(stcIrq.enIRQn); NVIC_SetPriority(stcIrq.enIRQn, ADC_SEQB_INT_PRIO); NVIC_EnableIRQ(stcIrq.enIRQn); ADC_IntCmd(ADC_UNIT, ADC_INT_EOCA | ADC_INT_EOCB, ENABLE); } static void ADC1_SeqA_IrqCallback(void) { uint16_t u16AdcVal; u16AdcVal ADC_GetValue(ADC_UNIT, ADC_SEQA_CH); ADC_ClearStatus(ADC_UNIT, ADC_FLAG_EOCA); DDL_Printf(ADC sequence A was triggered by ADTRG pin.\r\n); DDL_Printf(ADC value of sequence A channel: %u\r\n, u16AdcVal); } static void ADC1_SeqB_IrqCallback(void) { uint16_t u16AdcVal; u16AdcVal ADC_GetValue(ADC_UNIT, ADC_SEQB_CH); ADC_ClearStatus(ADC_UNIT, ADC_FLAG_EOCB); DDL_Printf(ADC sequence B was triggered by TMR0 event.\r\n); DDL_Printf(ADC value of sequence B channel: %u\r\n, u16AdcVal); }实验结果定时器TMR0_1中断触发ADC采样1秒一次PE7下降沿触发ADC采样。1、PB和PE的功能一样修改成PB7/* Hard trigger */ #define ADC_SEQA_HARDTRIG (ADC_HARDTRIG_ADTRG_PIN) #define ADC_SEQA_TRIG_PORT (GPIO_PORT_B) #define ADC_SEQA_TRIG_PIN (GPIO_PIN_07) #define ADC_SEQA_TRIG_PIN_FUNC (GPIO_FUNC_1)2、中断号随便改比如改成016也可以/* Interrupt */ #define ADC_SEQA_INT_PRIO (DDL_IRQ_PRIO_04) #define ADC_SEQA_INT_SRC (INT_SRC_ADC1_EOCA) #define ADC_SEQA_INT_IRQn (INT016_IRQn) #define ADC_SEQB_INT_PRIO (DDL_IRQ_PRIO_03) #define ADC_SEQB_INT_SRC (INT_SRC_ADC1_EOCB) #define ADC_SEQB_INT_IRQn (INT017_IRQn)3、修改定时器为TMR0_2:配置#define ADC_SEQB_HARDTRIG (ADC_HARDTRIG_EVT0) #define ADC_SEQB_AOS_TRIG_SEL (AOS_ADC1_0) #define ADC_SEQB_TRIG_EVT (EVT_SRC_TMR0_2_CMP_B) /* Timer0 for sequence B */ #define TMR0_UNIT (CM_TMR0_2) #define TMR0_CH (TMR0_CH_B) #define TMR0_PERIPH_CLK (FCG2_PERIPH_TMR0_2) #define TMR0_CLK_DIV (TMR0_CLK_DIV256) /* Period 1 Second, TMR0_CMP_VAL Timer0 clock / div - 1 */ #define TMR0_CMP_VAL (CLK_GetBusClockFreq(CLK_BUS_PCLK1) / (1UL (TMR0_CLK_DIV TMR0_BCONR_CKDIVA_POS)) - 1UL) #define TMR0_PERIPH_ENABLE() FCG_Fcg2PeriphClockCmd(TMR0_PERIPH_CLK, ENABLE)4、修改定时器为TMRA_1/******************************************************************************* * Include files ******************************************************************************/ #include main.h /* ADC unit instance for this example. */ #define ADC_UNIT (CM_ADC1) #define ADC_PERIPH_CLK (FCG3_PERIPH_ADC1) /* Selects ADC channels that needed. */ #define ADC_SEQA_CH (ADC_CH10) #define ADC_SEQA_CH_PORT (GPIO_PORT_C) #define ADC_SEQA_CH_PIN (GPIO_PIN_00) #define ADC_SEQB_CH (ADC_CH12) #define ADC_SEQB_CH_PORT (GPIO_PORT_C) #define ADC_SEQB_CH_PIN (GPIO_PIN_02) ///* Hard trigger */ //#define ADC_SEQA_HARDTRIG (ADC_HARDTRIG_ADTRG_PIN) //#define ADC_SEQA_TRIG_PORT (GPIO_PORT_E) //#define ADC_SEQA_TRIG_PIN (GPIO_PIN_07) //#define ADC_SEQA_TRIG_PIN_FUNC (GPIO_FUNC_1) /* Hard trigger */ #define ADC_SEQA_HARDTRIG (ADC_HARDTRIG_ADTRG_PIN) #define ADC_SEQA_TRIG_PORT (GPIO_PORT_B) #define ADC_SEQA_TRIG_PIN (GPIO_PIN_07) #define ADC_SEQA_TRIG_PIN_FUNC (GPIO_FUNC_1) #define ADC_SEQB_HARDTRIG (ADC_HARDTRIG_EVT0) #define ADC_SEQB_AOS_TRIG_SEL (AOS_ADC1_0) //#define ADC_SEQB_TRIG_EVT (EVT_SRC_TMR0_1_CMP_B) //#define ADC_SEQB_TRIG_EVT (EVT_SRC_TMR0_2_CMP_B) #define ADC_SEQB_TRIG_EVT (EVT_SRC_TMRA_1_OVF) ///* Timer0 for sequence B */ //#define TMR0_UNIT (CM_TMR0_1) //#define TMR0_CH (TMR0_CH_B) //#define TMR0_PERIPH_CLK (FCG2_PERIPH_TMR0_1) //#define TMR0_CLK_DIV (TMR0_CLK_DIV256) ///* Period 1 Second, TMR0_CMP_VAL Timer0 clock / div - 1 */ //#define TMR0_CMP_VAL (CLK_GetBusClockFreq(CLK_BUS_PCLK1) / (1UL (TMR0_CLK_DIV TMR0_BCONR_CKDIVA_POS)) - 1UL) //#define TMR0_PERIPH_ENABLE() FCG_Fcg2PeriphClockCmd(TMR0_PERIPH_CLK, ENABLE) ///* Timer0 for sequence B */ //#define TMR0_UNIT (CM_TMR0_2) //#define TMR0_CH (TMR0_CH_B) //#define TMR0_PERIPH_CLK (FCG2_PERIPH_TMR0_2) //#define TMR0_CLK_DIV (TMR0_CLK_DIV256) ///* Period 1 Second, TMR0_CMP_VAL Timer0 clock / div - 1 */ //#define TMR0_CMP_VAL (CLK_GetBusClockFreq(CLK_BUS_PCLK1) / (1UL (TMR0_CLK_DIV TMR0_BCONR_CKDIVA_POS)) - 1UL) //#define TMR0_PERIPH_ENABLE() FCG_Fcg2PeriphClockCmd(TMR0_PERIPH_CLK, ENABLE) /* TimerA for sequence B */ #define TMRA_UNIT (CM_TMRA_1) #define TMRA_CH (TMRA_CH_B) #define TMRA_PERIPH_CLK (FCG2_PERIPH_TMRA_1) #define TMRA_CLK_DIV (TMRA_CLK_DIV256) /* Period 1 Second, TMR0_CMP_VAL Timer0 clock / div - 1 */ #define TMRA_PERIOD_VAL ( (CLK_GetBusClockFreq(CLK_BUS_PCLK1) / 256UL) - 1UL ) #define TMRA_PERIPH_ENABLE() FCG_Fcg2PeriphClockCmd(TMRA_PERIPH_CLK, ENABLE) /* Interrupt */ #define ADC_SEQA_INT_PRIO (DDL_IRQ_PRIO_04) #define ADC_SEQA_INT_SRC (INT_SRC_ADC1_EOCA) //#define ADC_SEQA_INT_IRQn (INT116_IRQn) #define ADC_SEQA_INT_IRQn (INT016_IRQn) //any #define ADC_SEQB_INT_PRIO (DDL_IRQ_PRIO_03) #define ADC_SEQB_INT_SRC (INT_SRC_ADC1_EOCB) //#define ADC_SEQB_INT_IRQn (INT117_IRQn) #define ADC_SEQB_INT_IRQn (INT017_IRQn) static void SystemClockConfig(void); static void AdcConfig(void); static void AdcInitConfig(void); static void AdcSetPinAnalogMode(void); static void AdcHardTriggerConfig(void); static void AdcIrqConfig(void); static void AdcHardTriggerStart(void); static void ADC1_SeqA_IrqCallback(void); static void ADC1_SeqB_IrqCallback(void); int32_t main(void) { /* MCU Peripheral registers write unprotected. */ LL_PERIPH_WE(LL_PERIPH_GPIO | LL_PERIPH_FCG | LL_PERIPH_PWC_CLK_RMU); /* System clock config */ SystemClockConfig(); /* Initializes UART for debug printing. Baudrate is 115200. */ DDL_PrintfInit(BSP_PRINTF_DEVICE, BSP_PRINTF_BAUDRATE, BSP_PRINTF_Preinit); /* Configures ADC. */ AdcConfig(); /* MCU Peripheral registers write protected. */ LL_PERIPH_WP(LL_PERIPH_GPIO | LL_PERIPH_FCG | LL_PERIPH_PWC_CLK_RMU); /* Start the peripheral which is used to trigger ADC. */ AdcHardTriggerStart(); /***************** Configuration end, application start **************/ for (;;) { /* See ADC1_SeqA_IrqCallback(), ADC1_SeqB_IrqCallback() */ } } static void SystemClockConfig(void) { stc_clock_xtal_init_t stcXtalInit; /* XTAL config */ GPIO_AnalogCmd(BSP_XTAL_PORT, BSP_XTAL_PIN, ENABLE); (void)CLK_XtalStructInit(stcXtalInit); /* Config XTAL and Enable XTAL */ stcXtalInit.u8State CLK_XTAL_ON; stcXtalInit.u8Mode CLK_XTAL_MD_OSC; stcXtalInit.u8Drv CLK_XTAL_DRV_ULOW; stcXtalInit.u8StableTime CLK_XTAL_STB_2MS; (void)CLK_XtalInit(stcXtalInit); CLK_SetSysClockSrc(CLK_SYSCLK_SRC_XTAL); } static void AdcConfig(void) { AdcInitConfig(); AdcHardTriggerConfig(); AdcIrqConfig(); } static void AdcInitConfig(void) { stc_adc_init_t stcAdcInit; /* 1. Enable ADC peripheral clock. */ FCG_Fcg3PeriphClockCmd(ADC_PERIPH_CLK, ENABLE); /* 2. Modify the default value depends on the application. */ (void)ADC_StructInit(stcAdcInit); stcAdcInit.u16ScanMode ADC_MD_SEQA_SEQB_SINGLESHOT; /* 3. Initializes ADC. */ (void)ADC_Init(ADC_UNIT, stcAdcInit); /* 4. ADC channel configuration. */ /* 4.1 Set the ADC pin to analog input mode. */ AdcSetPinAnalogMode(); /* 4.2 Enable ADC channels. */ ADC_ChCmd(ADC_UNIT, ADC_SEQ_A, ADC_SEQA_CH, ENABLE); ADC_ChCmd(ADC_UNIT, ADC_SEQ_B, ADC_SEQB_CH, ENABLE); } static void AdcSetPinAnalogMode(void) { stc_gpio_init_t stcGpioInit; (void)GPIO_StructInit(stcGpioInit); stcGpioInit.u16PinAttr PIN_ATTR_ANALOG; (void)GPIO_Init(ADC_SEQA_CH_PORT, ADC_SEQA_CH_PIN, stcGpioInit); (void)GPIO_Init(ADC_SEQB_CH_PORT, ADC_SEQB_CH_PIN, stcGpioInit); } static void AdcHardTriggerConfig(void) { stc_tmra_init_t stcTmraInit; /************** Hard trigger of sequence A ****************/ GPIO_SetFunc(ADC_SEQA_TRIG_PORT, ADC_SEQA_TRIG_PIN, ADC_SEQA_TRIG_PIN_FUNC); ADC_TriggerConfig(ADC_UNIT, ADC_SEQ_A, ADC_SEQA_HARDTRIG); ADC_TriggerCmd(ADC_UNIT, ADC_SEQ_A, ENABLE); /************** Hard trigger of sequence B ****************/ /* Initials TIMER0. */ (void)TMRA_StructInit(stcTmraInit); stcTmraInit.sw_count.u8ClockDiv TMRA_CLK_DIV; stcTmraInit.u32PeriodValue (uint16_t)TMRA_PERIOD_VAL; TMRA_PERIPH_ENABLE(); (void)TMRA_Init(TMRA_UNIT, stcTmraInit); /* Specifies the event defined by ADC_SEQB_TRIG_EVT as the hard trigger of sequence B. */ FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE); ADC_TriggerConfig(ADC_UNIT, ADC_SEQ_B, ADC_SEQB_HARDTRIG); AOS_SetTriggerEventSrc(ADC_SEQB_AOS_TRIG_SEL, ADC_SEQB_TRIG_EVT); ADC_TriggerCmd(ADC_UNIT, ADC_SEQ_B, ENABLE); } static void AdcHardTriggerStart(void) { /************** Hard trigger of sequence A ****************/ /* Not needed here. */ /************** Hard trigger of sequence B ****************/ TMRA_Start(TMRA_UNIT); } static void AdcIrqConfig(void) { stc_irq_signin_config_t stcIrq; stcIrq.enIntSrc ADC_SEQA_INT_SRC; stcIrq.enIRQn ADC_SEQA_INT_IRQn; stcIrq.pfnCallback ADC1_SeqA_IrqCallback; (void)INTC_IrqSignIn(stcIrq); NVIC_ClearPendingIRQ(stcIrq.enIRQn); NVIC_SetPriority(stcIrq.enIRQn, ADC_SEQA_INT_PRIO); NVIC_EnableIRQ(stcIrq.enIRQn); stcIrq.enIntSrc ADC_SEQB_INT_SRC; stcIrq.enIRQn ADC_SEQB_INT_IRQn; stcIrq.pfnCallback ADC1_SeqB_IrqCallback; (void)INTC_IrqSignIn(stcIrq); NVIC_ClearPendingIRQ(stcIrq.enIRQn); NVIC_SetPriority(stcIrq.enIRQn, ADC_SEQB_INT_PRIO); NVIC_EnableIRQ(stcIrq.enIRQn); ADC_IntCmd(ADC_UNIT, ADC_INT_EOCA | ADC_INT_EOCB, ENABLE); } static void ADC1_SeqA_IrqCallback(void) { uint16_t u16AdcVal; u16AdcVal ADC_GetValue(ADC_UNIT, ADC_SEQA_CH); ADC_ClearStatus(ADC_UNIT, ADC_FLAG_EOCA); DDL_Printf(ADC sequence A was triggered by ADTRG pin.\r\n); DDL_Printf(ADC value of sequence A channel: %u\r\n, u16AdcVal); } static void ADC1_SeqB_IrqCallback(void) { uint16_t u16AdcVal; u16AdcVal ADC_GetValue(ADC_UNIT, ADC_SEQB_CH); ADC_ClearStatus(ADC_UNIT, ADC_FLAG_EOCB); DDL_Printf(ADC sequence B was triggered by TMRA_1 event.\r\n); DDL_Printf(ADC value of sequence B channel: %u\r\n, u16AdcVal); }改成TMRA_2跟TMR0_1改TMR0_2类似。